Bren Higgins, the Executive Vice President and Chief Financial Officer of KLA Corporation, revealed that TSMC has successfully secured 15 customers for its cutting-edge 2nm process, among which 10 are high-performance computing (HPC) clients. This development underscores the robust demand for the 2nm process, with the artificial intelligence (AI) industry poised to emerge as a pivotal application domain. TSMC's 2nm process adopts a GAA (Gate-All-Around) nanosheet architecture. When compared to the 3nm process, it delivers a 10% to 15% performance boost at equivalent power consumption levels. Alternatively, it achieves a 25% to 30% reduction in power consumption while maintaining the same speed, coupled with an over 15% increase in chip density. Presently, the Baoshan F20 wafer fab in Hsinchu boasts a monthly production capacity of 30,000 wafers, whereas the F22 wafer fab in Kaohsiung has a monthly capacity of 6,000 wafers. It is anticipated that the combined monthly output will surge to 40,000 wafers by the end of 2025, escalate to 100,000 wafers by the end of 2026, and ultimately peak at 200,000 wafers by 2028.